1. Field of the Invention
The present invention relates to an interconnect structure, an interconnect layout structure, and a manufacturing method thereof, and more particularly, to an interconnect structure with air gaps, an interconnect layout structure with air gaps and manufacturing method thereof.
2. Description of the Prior Art
As the semiconductor industry introduced new generations of integrated circuits (hereinafter abbreviated as ICs) having higher performance and more functionalilty, the density of elements forming the ICs is increased, while the size of the semiconductor devices and line width of the interconnect structures concurrently are reduced. Consequently, more issues are created because of such reductions. For example, when distance between two adjacent conductive lines is reduced, line resistance (R), and parasitic capacitance (C) are increased, and thus resistance-capacitance time delay (RC delay) is increased. RC delay unwantedly lowers IC computing speed and performance. Moreover, abovementioned adverse impact from RC delay is increased when the line width of the ICs is smaller than 0.15 and/or 0.13 micrometer (μm).
Since RC delay is determined by the product of the line resistance and parasitic capacitance of the conductive line, as a countermeasure against to the problem, there has been proposed to use conductive materials with lower capacitance, or to lower the parasitic capacitance between the two conductive lines. Furthermore, since the parasitic capacitance is related to dielectric constant (k) of the insulating material between the two conductive lines, it can be reduced when the insulating material(s) having lower dielectric constant is adopted. Additionally, insulating material(s) having dielectric constant lower than 2.5-3.5, also known as low-k insulating material(s) not only reduces parasitic capacitance and RC delay, but also reduces power consumption. Consequently, adoption of low-k dielectric materials optimize performance of the interconnect structure in a ultra large scale integration (ULSI).
Furthermore, air is used as an insulating material between the conductive lines because dielectric constant of air is about 1. Additionally, air gap not only reduces RC delay, but also has advantage of low heat conductivity. Although the formation of air gaps reduces the parasitic capacitance, the conventional process suffers from other drawbacks. For example, air gap is not strong enough to support the conductive lines and thus reliability issue is generated. Furthermore, the formation of air gaps is a complicated processing and cannot be made in a mass production. Accordingly, a method for manufacturing the interconnect structure with air gaps is still in need.